Building your own RISC-V CPU and compiler
Jason K
Talk Track One
BeagleBoard.org BeagleV-Fire is an open source hardware board with a Microchip Polarfire SoC with quad 64-bit RISC-V CPU cores and an FPGA fabric. Using an open source core customized for low-latency I/O compiled into the FPGA fabric, code loading is performed using memory-mapped accesses from Linux running on the primary cores. A simple Ruby-like language is defined with communication primitives back to the host. A ground-up compiler is constructed to output RISC-V instructions for running on the target core. Construction of the compiler is covered step-by-step from running a single emitted ADD instruction to richer compiled code with method definitions, expressions and variables. Presentation walks through a rebased version control history to maximize understanding and reconstitution.