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View Purchasing OptionsProject update 7 of 9
Hi All,
It’s been a couple of months now since the campaign ended, so here’s an update on how things are going.
As soon as the funds came through, I fired off the PCBA orders and, as of a couple of weeks ago, all of the assembled PCBAs and custom panels for the first batch of Tiliquas, Screens, Expanders and Soldiercrabs have arrived in my lab! This includes five different PCBA designs (with components) and four different blank PCBs (panels). For this first batch, I have enough parts to cover all of the backer orders during the campaign, plus a 10% margin for any unforeseen yield issues.
Currently, I’m knee-deep in individually testing each PCBA and assembling them into finished units. This is mostly manual work, it takes me about a full day to build and test 20 Tiliquas, or a full day for ten Screens (the screen assembly is a bit more complicated). To try and speed this up, I’ve been working on automating the test procedures and 3D-printing some jigs to help out with the screen assembly. But for a niche product like this it’s hard to find the right balance of automation and just grinding through the units. In any case, here are some pictures of the first batch:
Simultaneously with building units, there are so many bits and bobs that I’m busy trying to source:
I’ve been building some mockups of the packaging, below you can also see the automatically-generated label with datamatrix based on the simple_zpl2 library credit to some fixes from Piotr Esden-Tempski.
In the space between other things, I’ve implemented a few new features in Tiliqua’s gateware/firmware.
Something Tiliqua’s DSP library was missing until now was any frequency-domain cores, like FFTs, windowing functions, or spectral analysis. As of this PR (gruesome details therein), we now have lots of frequency-domain cores including reversible STFTs, a Vocoder demo, and a spectrum analyzer demo!
This is actually one a few people contacted me about: "can I somehow save the state of the Tiliqua and restore it later?" Well, now you can! I’ve added a button to each bitstream for saving the current state, which persists the current bitstream and every altered option to the SPI flash, so if you cut power to your Eurorack system and power things up again, it will boot up the same bitstream you had selected and re-load exactly the same settings. Here’s a quick demo:
This will hopefully make it a bit easier to use Tiliqua for reproducible patches and for live use. For more technical details, you can check out the PR. This was quite an interesting challenge, also optimizing for reducing flash write/erase cycles with wear leveling.
Although all the audio traces you see in the Tiliqua demos are hardware accelerated, the text rendering is not. Tiliqua’s RISCV CPU (Vexiiriscv) was directly writing to the framebuffer. This is generally fast enough for the menu system, but I have some ideas for bitstreams that would need to draw lots of text or lines, and I got a bit nerd-sniped by trying to speed this up by writing a small bit blitting and line-drawing coprocessor for the CPU that is fully compatible with Rust’s embedded-graphics library. Anyway, I got a proof-of-concept working and now we can draw text and lines over 10x faster than before! A little demo:
The nice thing about this tiny GPU is it actually reduces the size of the bitstreams overall, as I am able to shrink the cache on the RISCV CPU and disable some features, while maintaining the same performance as before, which will give us more space for DSP functions. In any case, the code for this currently lives on a separate branch, which I’m hoping to merge in the next week or two. It still needs to be cleaned up a bit.
Besides building and testing units, designing the packaging, more procurement and everything I mentioned above, one of my bigger timeline ‘fears’ at the moment is all the documentation that needs to be added to the existing documentation: in particular some kind of overview of all the different software/gateware components, a tutorial on writing your own bitstream or modifying an SoC bitstream from end-to-end, and a more basic manual for using Tiliqua without touching the gateware at all. This will need to be a big focus for me as well over the next couple of months.
All things considered, I am still (cautiously) optimistic that I can ship all the backer units by November as planned. It will be tight, but as of now I can’t think of any major reason this will not happen, unless something crazy occurs like a massive yield fallout during testing, an unplanned compliance/certification hurdle, or the shipment being held in customs for unexpectedly long. There are always risks in hardware but rest assured I’m staying committed to getting these out the door as fast as I can!
In any case, I am super grateful for your patience and support thus far, and thanks for reading!
P.S.: I will be in Spain this weekend for ORConf 2025 and will give a short talk on Tiliqua and this campaign (as well as have one with me!). If you happen to be there, come say hi! Otherwise, the talk will be recorded and uploaded and I’ll link to it in the next update.