Project update 5 of 11
The iotSDR has a Max2769 GNSS front-end chip capable of receiving on the GNSS L1 band. GNSS systems are similar, in some respects, to satellite communication systems. They provide a unique set of features that we believe justifies the inclusion of such a specialized receiver chip. Some of the features that we would like to discuss here include:
To achieve their performance requirements, GNSS receivers typically rely on a specific front-end rather than a generic SDR front-end.
The GNSS chip on iotSDR has a transmit-only SPI interface for configuration and I/Q (or simple I) streaming. It can be configured in a variety of ways. For general usage, we have configured the chip to have a 16.384 MSPS sampling rate, with 4.092 MHz Intermediate Frequency (IF) streaming from 2-bit I and 2-bit Q interfaces. The block design in the FPGA Programmable Logic (PL) element of the ZYNQ SoC compacts 8 samples of 4-bit data into a 32-bit word, stores it in ping-pong memory, and makes it available to the ARM Processing System (PS) element of the SoC. The LwIP-based application in the PS transmits the logged data via UDP or TCP stream. That stream can be received on a host using a python script, a C++ application, or GNU Radio’s iotSDR module. Finally, the received data can be post-processed using available GNSS software-defined receivers.
iotSDR is part of Microchip Get Launched