Project update 59 of 75
Brief update this time as it’s nearly time to get to Taipei Airport.
Am on the way to Brussels - a little early - so as to be reasonably timezone-synced for the 2nd, 3rd and 4th. There’s a meeting at the Atlas Hotel at 3 PM on the 2nd for RISC-V, I have the stand and a talk to give on the 3rd (if anyone is around I could really use some help, it’s not fair to the FOSDEM organisers or other people if it’s unattended even if I go get something to eat), an Open Hardware dinner to go to that evening, then on the 4th stand again and another talk: thank you to Wim for agreeing to help out with the stand there. Also I am meeting the ZeroPhone creator probably on the 6th. I will be bringing some of the 2.7.4 boards and the 1.6 and 1.7 Micro Desktops, anyone who would like to support the project please drop by. By the 7th I am on my way to the UK to sort out a client’s computers and their website, then visit my brother for a week, and finally back on the 21st, via Amsterdam, to Taipei.
In between all that, the EOMA68-A20 Revision 2.7.5 PCBs might not get completed and almost certainly won’t get assembled before the 10th as they’ll hit Chinese New Year. We might get lucky and have the PCBs back, if so I will post photographs. It turns out 1600 MHz DDR3 RAM is still easy to get. However, 1833 MHz DDR3 RAM is what Hynix is still willing to manufacture. Cannot make a decision here on purchasing until the PCBs are manufactured and tested.
The Shakti Team will definitely have completed the tape-out of their 8-stage 2.5 GHz 120 mW RISC-V implementation, in an experimental ultra-low-power 20 nm process at TSMC. Yes, really: 120 mW, 2.5 GHz. It means that we could do a 16-core SMP processor and easily hit a 2.5 watt budget if we really wanted to. A GSoC 2018 application has been put in under the umbrella of the Libre Cores project. Oh, and alongside the offer from the head of the Shakti Team to provide free access to their resources, the sponsor who wishes to remain anonymous for now - the one who sent me the zc706 FPGA board - has asked "would a budget of USD $250,000 help" and I of course said yes.
Have been talking with Jeff, the creator of Nyuzi, assessing viability for a 3D Engine, it’s based on the Larabee Project. It’s primarily a general-purpose parallel compute engine, enough parallelism and it might just do the job. I pointed out that MIPS used to have white papers on their website which suggested that adding a "1/x^2" instruction as well as going to half-precision for the last stages of 3D calculations can dramatically speed up software-based rendering without needing specialist hardware blocks: this has given him some food for thought, which is a good sign.
Also rhombus tech web site header updated to include links to Liberapay and bitcoin, financial support greatly appreciated, both ongoing and in the future. Discussion on the mailing list welcomed and encouraged.