Libre RISC-V M-Class

A 100% libre RISC-V + 3D GPU chip for mobile devices

Dec 30, 2019

Project update 9 of 10

NLNet Grants approved, Power ISA under consideration

by Luke Kenneth Casson Leighton

Across several projects, nearly EUR 400,000 worth of additional funding applications were put in, and around EUR 200,000 to 250,000 of those have been approved. The RISC-V Foundation’s continued extreme unethical actions have led us to consider using Power ISA.

NLNet Grants

NLNet were first approached eighteen months ago, with an initial application to develop the core of a privacy-respecting trustable processor. Whilst NLNet’s primary focus of the past fifteen years has been software, they have funded reverse-engineering for Osmocon BB and for OpenBSC so are no strangers to hardware. The problem with software is: if the hardware cannot be trusted, then no amount of trustable, open and transparent software will help.

The additional proposals expand on the core, to cover: using the Alliance / Coriolis2 ASIC layout tools; Additional funding will go to the nmigen team for ASIC improvements and special integration with Coriolis2

The goal here is to get to a working, commercially viable 180 nm single-core ASIC at around 300 to 350 MHz, suitable for use as a high-end embedded controller. Staf from Chips4Makers will act as the "NDA firebreak" between us and TSMC. (Side note: Staf ran a Crowd Supply campaign, and the NLNet funding will help him to realise that project and perhaps re-start a new campaign for the Retro-uC one day).

All of these have been approved by NLNet, and, crucially, the external independent review process successfully completed for each. The exact amounts of each grant is to be confirmed, with each being possible to be up to the limit of EUR 50,000 for each sub-project.

Part of the process was a little tricky, initially: the independent reviewers expressed surprise at the amounts being requested for sub-tasks when the initial application back in December 2019 was so small, relative to the intended goal. The reason was very simple: both Jacob and I have unique low-income circumstances that simply do not need European / Western style living expenses. Whereas, when we get to much more specialist tasks (such as formal mathematical proofs, video assembly-level drivers, and so on), these fields are so specialized that finding people who are good and who are able to exist on student or southeast-asia-level funding is just not practical.

Therefore, we made sure that the calculations were based around an approximate EUR 3,000 per month budget per person, bearing in mind that due to NLNet’s international tax agreements, this being donations, that’s equivalent to a "wage" of approximately nearly twice that amount (three times if, as a business, you have to take into consideration corporation tax / employee insurance as well).

We now need to find people willing to help do the work. What is really nice is that NLNet will donate money to them for completion of that work! Therefore, if you’ve always wanted to work on a 3D processor, its drivers and its source code, do get in touch.


This is a long story that was picked up by Phoronix before we had a chance to make any kind of real "announcement." However, we’re always really grateful to Michael for his coverage of the Libre SoC, as it always sparks some insightful, useful, and engaging discussions.

The summary is this: Libre and Open contributors to RISC-V have been disregarded for several years. Long before I joined the RISC-V mailing lists, it was well-known within that small and tightly-knit community that if you were not associated directly with UC Berkeley, you were basically not welcome. Caveat: if you signed the NDA-like agreement which conflicts directly with, for example, the Debian Charter and the whole purpose of libre licenses, then you got a "voice" and you got access to the closed and secretive RISC-V resources and mailing lists.

Michael puts it extremely well: I have absolutely no problem with the ISA itself, it’s the abuse of power and the flagrant ignoring and abuse of basic tenets of trademark law that are just completely untenable. Not only that: one well-paid employee of SiFive has repeatedly engaged in defamation attacks for over eighteen months. Even raising a formal complaint through the newly-established relationship with the Linux Foundation failed to keep that individual under control. Also adversely impacted was the newly-established Open Graphics Alliance initiative, which was independently started by Pixilica back in October, proposed at SIGGRAPH 2019 and welcomed by world-leading 3D industry experts.

At some point you just have to appreciate that to continue to support an unethical organisation is itself unethical, and thus I made the decision to reach out to MIPS and Power. The MIPS website didn’t even work, so I gave up there immediately. The Open Power Foundation on the other hand, I was both delighted and surprised to hear back from a former colleague when I was in Canberra, 20 years ago: Hugh Blemings.

Hugh is extremely knowledgeable, highly intelligent, and completely understands Libre and Open principles. We had only 15 minutes to talk before he had to focus on preparing for the upcoming Open Power Conference: in that short time, we covered:

It was a very busy and positive conversation, where it is clear that we caught them at just the right time in the process. Consequently, my discussion with Hugh was just at the right time. Without that, the existing OpenPower members might never have really truly believed that any Libre commercial project would ever in fact come forward and that the steps the OpenPower members were taking were purely hypothetical. Out of the blue (pun intended), I contact Hugh and highlight that no, it’s not hypothetical.

The next step, then, will be to wait until mid-january when people come back from holiday, and wait for the announcement of the OpenPower license agreement. Hugh reassures me that there’s nothing spectacularly controversial in it, and given his long-standing experience of several decades with the Libre and Open Communities, I cannot think of a reason why it would not be possible to sign it. We just have to see.

The timing here with NLNet is just on the edge: we have to create a full list of milestones and assign a fixed budget to each (then later subdivide them into sub-tasks under that milestone). This is a leeeetle bit challenging when we have not yet reviewed the OpenPower agreement, however, given that the majority of the tasks are ISA-independent, it will actually work out fine.

The only other major thing: what the heck do we do with the domain? As you can see on the mailing list decision, we decided to go with a userspace RV64GC dual-ISA front-end. Userspace RISC-V POSIX (Linux / Android) applications will work perfectly well, as will userspace PowerISA POSIX applications, however the kernel (supervisor) space will be entirely PowerISA.

The video and 3D acceleration opcodes will be entirely in the Power ISA. We are sick and tired of the RISC-V Foundation’s intransigence and blatant mismanagement. Therefore, we will comply to the absolute minimal letter with RV64GC for the benefit of our users, backers, and sponsors who will be expecting RISC-V Compliance. However, RISC-V and the RISC-V ISA itself will no longer receive the benefit of the advancements and innovation that we have received funding and support to develop.

So, the assembly-code being written by hand for the video acceleration side, as well as the 3D drivers for Kazan and MESA, will "flip" from RV64GC RISC-V over to the Power ISA, which will be fully 3D accelerated with advanced Simple-V Vector operations, then return back to userspace RISC-V RV64GC ISA to continue serving the user application.

Next steps for us include setting up a foundation under which the processor can be developed, and to look towards the next major funding step: USD 10M to 20M.

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