Libre RISC-V M-Class
A 100% libre RISC-V + 3D GPU chip for mobile devices
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The Libre RISC-V M-Class is a RISC-V chip that is libre-licensed to the bedrock. It is a low-power, mobile-class, 64-bit Quad-Core SoC at a minimum 800mhz clock rate, suitable for tablet, netbook, and industrial embedded systems. Full source code and files are available not only for the operating system and bootloader, but also for the processor, its peripherals and its 3D GPU and VPU.
Onboard the Libre RISC-V M-Class is the Kazan GPU, a libre-licensed, software-rendered Vulkan Driver written in Rust that uses LLVM for code generation. Kazan will use optimised 3D instructions specifically designed for and added to the Libre RISC-V M-Class SoC, yet Kazan itself may still be used (unoptimised) on other hardware.
The performance target for Kazan on the Libre RISCV SoC is a very modest mobile-class level (1280 x 720 25 fps, 100 Mpixels/sec, 30 Mtriangles/sec, 5-6 GFLOPs), whilst the power budget is very tight (under 2.5 watts in a 28 nm process). With RISC-V being 40% more power efficient than x86 or ARM, this is very reasonably achievable.
Project Updates
NLNet Grants approved, Power ISA under consideration
Across several projects, nearly EUR 400,000 worth of additional funding applications were put in, and around EUR 200,000 to 250,000 of those have been approved. The RISC-V Foundation's continued extreme unethical actions have led us to consider using Power ISA. Read the full update.
Intriguing Ideas
Pixilica starts a 3D Open Graphics Alliance initiative; we decide to go with a "reconfigurable" pipeline; seven additional 50,000 EUR NLNet grant proposals submitted. Read the full update.
Purism Donation
We are delighted to be able to announce additional sponsorship by Purism, through NLNet. Read the full update.
First NLNet Grant Approved to Fund Development
Our first grant application has been approved and we're about to submit another. Plus, some updates from the past few months. Read the full update.
Microarchitecture by Osmosis
Spread over various videos, writings, and mailing list discussions, a picture is beginning to emerge of a suitable microarchitecture. Read the full update.
Modernising 1960s computer technology: learning from the CDC 6600
Following on from the analysis of the Tomasulo algorithm, by a process of osmosis I finally was able to make out a light at the end of the "scoreboard" tunnel, and it is not an oncoming train. Conversations with Mitch Alsup are becoming clear, providing insights that, as we will find out below, have not made it into the academic literature in over 20 years. Read the full update.
Microarchitectural Decisions
The Libre-RISCV core is planning to deploy an innovative vectorisation system, known as Simple-V. Honestly, it's not very simple at all! Read the full update.
Comments on recent Phoronix articles
Many thanks to Michael Larabel, who has been writing early articles on this project before we had a chance to get this pre-launch page up and running. What follows are some of my observations and responses about the articles. Read the full update.
Why make a quad-core 64-bit SoC? Surely, there are enough already!
So, the year is 2018, and there does not exist a single commercial "System-on-a-Chip" (SoC) that is capable of running 3D mobile games and playing 1080p60 video, where the end-user, including commercial customers, can say that they have full control over their devices. Read the full update.
