AntSDR E200

A powerful, versatile, FPGA-based software-defined radio based on the ZYNQ and AD936x chipsets

Jun 06, 2023

Project update 3 of 9

Answering Your Questions

by Aero, Chao Jiang, Chaochen Wei

Hello everyone, this is our weekly update. First of all, I would like to express my gratitude to everyone who has supported us. Without your support, our crowdfunding campaign would not have reached its goal so quickly. To be honest, it has far exceeded our humble expectations. Today, we are here to summarize the most frequently asked questions we have received so far.

1. Frequency Accuracy

In our previous update, we briefly introduced the operation of using an external PPS/10 M (Pulse Per Second) to tune the local oscillator. However, that was only a quick demonstration to show that AntSDR can tune the local oscillator, and we didn’t set up the experimental environment in detail. In this update, we will carefully build the environment, and ultimately, we will see that the accuracy of the local oscillator can reach ±10 ppb.

Our experimental setup is as follows: a GPSDO (GPS disciplined oscillator) module that provides a 10 MHz reference clock output and a PPS output. We connect the 10 MHz output of the GPSDO to the 10 MHz reference input of the spectrum analyzer. Our spectrum analyzer has a 10 MHz reference output, which we connect to the reference input of the AntSDR.

This is a diagram of the setup:

With this environment set up, let’s start the testing. First, we set the center frequency of the spectrum analyzer to 1 GHz, and the span to 1 kHz.

Now we can see the output of the local oscillator on the spectrum analyzer. The current frequency is 999.999996 MHz, which is very close to our tx local oscillator frequency. Let’s now enable the maximum hold function on the spectrum analyzer and observe the range of the local oscillator variation.

The local oscillator is varying within a very small range. Currently, our span is set to 1 kHz, and each grid on the spectrum analyzer represents 100 Hz. We can roughly estimate that the variation of the local oscillator is about ±10 ppb. Now, let’s adjust the span to 100 Hz to examine the details.

We can see that the error of the local oscillator is within ±20 Hz. It is worth noting that the current GPSDO’s accuracy is not very high. Using a higher precision GPSDO may help improve the accuracy.

2. FPGA Resources

Some customers are concerned about the FPGA resources of AntSDR as they may want to implement their own functionalities on the FPGA. Here, we provide a list of the FPGA resources available in AntSDR E200: | Item ~active | Resource ~active | | - | - | | Logic Cells ~info | 85 K | | LUTs ~info | 53,200 | | Flip-Flops ~info | 106,400 | | BRAM ~info | 4.9 Mb (140 36 K BRAM) | | DSP Slices ~info | 220 |

3. Are there any demos for these APIs?

Since E200 supports two different firmwares, libiio and UHD, it can also use C/C++ based libiio or UHD interfaces to configure sdr and obtain data streams. Considering that some sdr enthusiasts have not been exposed to these two interfaces, here is a simple example provided by the official firmwares as a learning method. Please note that UHD firmware needs to be booted with sd card, while iio firmware is booted with qspi. The demo path is located in our GitHub at this link: https://github.com/MicroPhase/antsdr_doc_en/tree/master/demo

IIO demo for libiio

To learn more about iio, check out the official iio example for the ad9361. This demo is an example provided by libiio to control ad9361 and obtain an iq data stream. In in addition to examples, there are many APIs of libiio, from which radio enthusiasts can complete their own projects through custom programming.

We now try to compile the example into an executable program, and then run the iq flow on the host.

IIO Example

Using Linux, enter the iio folder, where there is a main.c file and a CMakeLists.txt file. Through these two files we will compile the executable file. Please note that compiling this file requires the libiio library, so you may first need install libiio, following their installation guide.

After installing libiio, run the following command:

mkdir build && cd build
cmake ..
make
jcc@jcc:~/demo/iio/build$ cmake ..
CMake Deprecation Warning at CMakeLists.txt:1 (cmake_minimum_required):
  Compatibility with CMake < 2.8.12 will be removed from a future version of
  CMake.

  Update the VERSION argument <min> value or use a ...<max> suffix to tell
  CMake that the project does not need compatibility with older versions.


-- The C compiler identification is GNU 9.4.0
-- Detecting C compiler ABI info
-- Detecting C compiler ABI info - done
-- Check for working C compiler: /usr/bin/cc - skipped
-- Detecting C compile features
-- Detecting C compile features - done
-- Found PkgConfig: /usr/bin/pkg-config (found version "0.29.1") 
-- Checking for module 'libiio'
--   Found libiio, version 0.24
-- Configuring done (0.1s)
-- Generating done (0.0s)
-- Build files have been written to: /home/jcc/demo/iio/build

jcc@jcc:~/demo/iio/build$ make
[ 50%] Building C object CMakeFiles/iio_stream.dir/main.c.o
[100%] Linking C executable iio_stream
[100%] Built target iio_stream

After the compilation is successful, we can now see the iio_stream executable file. Next, connect the device and set the host IP.

Run this command:

./iio_stream "ip:ant.local"

If everything is normal, we can see the following information:

jcc@jcc:~/demo/iio/build$ ./iio_stream "ip:ant.local"
* Acquiring IIO context
* Acquiring AD9361 streaming devices
* Configuring AD9361 for streaming
* Acquiring AD9361 phy channel 0
* Acquiring AD9361 RX lo channel
* Acquiring AD9361 phy channel 0
* Acquiring AD9361 TX lo channel
* Initializing AD9361 IIO streaming channels
* Enabling IIO streaming channels
* Creating non-cyclic IIO buffers with 1 MiS
* Starting IO streaming (press CTRL+C to cancel)
    RX     1.05 MSmp, TX     1.05 MSmp
    RX     2.10 MSmp, TX     2.10 MSmp
    RX     3.15 MSmp, TX     3.15 MSmp
    RX     4.19 MSmp, TX     4.19 MSmp
    RX     5.24 MSmp, TX     5.24 MSmp
    RX     6.29 MSmp, TX     6.29 MSmp
    RX     7.34 MSmp, TX     7.34 MSmp
    RX     8.39 MSmp, TX     8.39 MSmp
    RX     9.44 MSmp, TX     9.44 MSmp
    RX    10.49 MSmp, TX    10.49 MSmp
    RX    11.53 MSmp, TX    11.53 MSmp
    RX    12.58 MSmp, TX    12.58 MSmp
    RX    13.63 MSmp, TX    13.63 MSmp
    RX    14.68 MSmp, TX    14.68 MSmp
^CWaiting for process to finish... Got signal 2
    RX    15.73 MSmp, TX    15.73 MSmp
* Destroying buffers
* Disabling streaming channels
* Destroying context

UHD Demo

Similarly, USRP UHD has many examples in the path /usr/local/lib/UHD/examples. There are detailed interface information descriptions located here: https://kb.ettus.com/Getting_Started_with_UHD_and_C%2B%2B.

-rwxr-xr-x 1 root root 390664 4月  26 18:30 benchmark_rate
-rwxr-xr-x 1 root root 411752 3月   4 15:16 benchmark_streamer
-rwxr-xr-x 1 root root 295040 4月  26 18:30 gpio
-rwxr-xr-x 1 root root 271312 4月  26 18:30 latency_test
-rwxr-xr-x 1 root root 356496 4月  26 18:30 network_relay
drwxr-xr-x 2 root root   4096 4月  26 18:33 python
-rwxr-xr-x 1 root root 329216 3月   4 15:16 replay_samples_from_file
-rwxr-xr-x 1 root root 299672 4月  26 18:30 rfnoc_nullsource_ce_rx
-rwxr-xr-x 1 root root 307896 4月  26 18:30 rfnoc_radio_loopback
-rwxr-xr-x 1 root root 294904 4月  26 18:30 rfnoc_replay_samples_from_file
-rwxr-xr-x 1 root root 325616 4月  26 18:30 rfnoc_rx_to_file
-rwxr-xr-x 1 root root 333728 4月  26 18:30 rx_ascii_art_dft
-rwxr-xr-x 1 root root 296016 4月  26 18:30 rx_multi_samples
-rwxr-xr-x 1 root root  22592 4月  26 18:30 rx_samples_c
-rwxr-xr-x 1 root root 322984 4月  26 18:30 rx_samples_to_file
-rwxr-xr-x 1 root root 285512 4月  26 18:30 rx_samples_to_udp
-rwxr-xr-x 1 root root 287000 4月  26 18:30 rx_timed_samples
-rwxr-xr-x 1 root root 193568 4月  26 18:30 sync_to_gps
-rwxr-xr-x 1 root root 316120 4月  26 18:30 test_clock_synch
-rwxr-xr-x 1 root root 312528 4月  26 18:30 test_dboard_coercion
-rwxr-xr-x 1 root root 263856 4月  26 18:30 test_messages
-rwxr-xr-x 1 root root 103088 4月  26 18:30 test_pps_input
-rwxr-xr-x 1 root root 193312 4月  26 18:30 test_timed_commands
-rwxr-xr-x 1 root root 385968 4月  26 18:30 twinrx_freq_hopping
-rwxr-xr-x 1 root root 301952 4月  26 18:30 tx_bursts
-rwxr-xr-x 1 root root 439800 4月  26 18:30 txrx_loopback_to_file
-rwxr-xr-x 1 root root  18336 4月  26 18:30 tx_samples_c
-rwxr-xr-x 1 root root 295800 4月  26 18:30 tx_samples_from_file
-rwxr-xr-x 1 root root 273344 4月  26 18:30 tx_timed_samples
-rwxr-xr-x 1 root root 324072 4月  26 18:30 tx_waveforms
-rwxr-xr-x 1 root root 122480 4月  26 18:30 usrp_list_sensors

Here we use UHD to configure the ad9361.

UHD Example

Enter the UHD folder using Linux. There is a main.cpp file and a CMakeLists.txt file. Through these two files, we can compile an executable file. Please note that the UHD modified by Microphase based on Ettus must be installed first. The installation link is here: https://github.com/MicroPhase/antsdr_uhd. There is an installation method in the host directory.

After installing libiio, run the following command:

mkdir build && cd build
cmake ..
make
jcc@jcc:~/demo/UHD/build$ cmake ..
CMake Deprecation Warning at CMakeLists.txt:1 (cmake_minimum_required):
  Compatibility with CMake < 2.8.12 will be removed from a future version of
  CMake.

  Update the VERSION argument <min> value or use a ...<max> suffix to tell
  CMake that the project does not need compatibility with older versions.


-- The C compiler identification is GNU 9.4.0
-- The CXX compiler identification is GNU 9.4.0
-- Detecting C compiler ABI info
-- Detecting C compiler ABI info - done
-- Check for working C compiler: /usr/bin/cc - skipped
-- Detecting C compile features
-- Detecting C compile features - done
-- Detecting CXX compiler ABI info
-- Detecting CXX compiler ABI info - done
-- Check for working CXX compiler: /usr/bin/c++ - skipped
-- Detecting CXX compile features
-- Detecting CXX compile features - done
-- Found PkgConfig: /usr/bin/pkg-config (found version "0.29.1") 
-- Checking for module 'uhd'
--   Found uhd, version 4.1.0.0-18-g34781496
-- Configuring done (0.3s)
-- Generating done (0.0s)
-- Build files have been written to: /home/jcc/demo/uhd/build

jcc@jcc:~/demo/uhd/build$ make
[ 50%] Building CXX object CMakeFiles/init_usrp.dir/main.cpp.o
[100%] Linking CXX executable init_usrp
[100%] Built target init_usrp

After the compilation is successful, we can see the init_usrp executable file. At this time, connect the device and set the host ip.

Run this command:

./init_usrp
jcc@jcc:~/demo/uhd/build$ ./init_usrp 
[INFO] [UHD] linux; GNU C++ version 9.4.0; Boost_107100; UHD_4.1.0.0-18-g34781496

[WARNING] [UHD] Unable to set the thread priority. Performance may be negatively affected.
Please see the general application notes in the manual for instructions.
EnvironmentError: OSError: error in pthread_setschedparam
Creating the usrp device with: type=ant...
[INFO] [ANT] Detected Device: ANTSDR
[INFO] [ANT] Initialize CODEC control...
[INFO] [ANT] Initialize Radio control...
[INFO] [ANT] Performing register loopback test... 
[INFO] [ANT] Register loopback test passed
[INFO] [ANT] Performing register loopback test... 
[INFO] [ANT] Register loopback test passed
[INFO] [ANT] Setting master clock rate selection to 'automatic'.
[INFO] [ANT] Asking for clock rate 16.000000 MHz... 
[INFO] [ANT] Actually got clock rate 16.000000 MHz.
Lock mboard clocks: internal
Setting RX Rate: 1.000000 Msps...
[INFO] [ANT] Asking for clock rate 32.000000 MHz... 
[INFO] [ANT] Actually got clock rate 32.000000 MHz.
Actual RX Rate: 1.000000 Msps...

Setting RX Freq: 915.000000 MHz...
Actual RX Freq: 915.000000 MHz...

Setting RX Gain: 10.000000 dB...
Actual RX Gain: 10.000000 dB...

Setting RX Bandwidth: 1.000000 MHz...
Actual RX Bandwidth: 1.000000 MHz...

Setting RX Antenna: TX/RX
Actual RX Antenna: TX/RX

We hope these examples help to explain how to use our AntSDR E200 products. Thank you to all who have supported us so far! If you haven’t secured your own AntSDR E200 yet, please consider doing so while the campaign is live, so that you can get your AntSDR E200 at the best price.

Thank you, Microphase team


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AntSDR E200 is part of AMD FPGA Playground

Key Components

ZYNQ7020 · FPGA

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