PZSDR P401

A software-defined radio based on the AMD Zynq™ UltraScale+™ XCZU4EV MPSoC and AD9361 chipsets

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Jul 20, 2026

Project update 2 of 2

First Boot - Verifying the Hardware Platform

by Guangyi Yuan

One of the questions we hear most often is: What does the first boot experience look like?

In this update, we’d like to walk you through the complete power-on verification process of the P401. This is the same procedure our engineering team uses to verify that the board and its major peripherals are functioning correctly before software development begins.

Although this is a basic hardware verification, it also provides a quick introduction to the platform for new users.

Preparing the Board

Getting started with the P401 only requires a few simple connections:

Once everything is ready, simply power on the board.

Watching the System Boot

After power is applied, the boot log is displayed through the serial console. Opening the terminal before powering on allows you to capture the complete startup sequence.

The default serial configuration is:

After logging into Linux, the board is ready for interface verification.

Verifying the Hardware Interfaces

The power-on verification demonstrates the functionality of several key interfaces on the P401:

For Ethernet testing, the board is configured with the default IP address 192.168.1.10. After assigning a compatible IP address to the host computer, a simple ping test confirms successful network communication.

Additional peripherals, including USB storage devices and M.2 SSDs, can also be connected to verify that the operating system detects them correctly.

Why This Matters

Reliable hardware verification is the foundation for every SDR application.

Whether you’re planning to develop with GNU Radio, ADI no-OS, OpenWiFi, or your own FPGA design, a stable and repeatable startup process ensures that the underlying hardware is operating as expected before moving on to software development.

This verification procedure is also the same process used by our engineering team during board bring-up and functional testing.

Watch Our Demonstration Video

In the video below, we demonstrate the complete startup process, from connecting the power supply to logging into Linux and verifying the major hardware interfaces.

We hope this walkthrough helped you become familiar with the P401 platform.

In our next update, we’ll demonstrate running the ADI no-OS framework on the P401 and show how developers can quickly begin working with the AD9361 transceiver.


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PZSDR P401 is part of AMD FPGA Playground

Key Components

AMD Zynq UltraScale+ SoC · XCZU4EV MPSoC

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