PZSDR P401 is a powerful and versatile software-defined radio (SDR) platform.

It is based on the AMD Zynq™ UltraScale+™ XCZU4EV MPSoC and the Analog Devices AD9361 chipsets. Its primary feature is 2T2R synchronized operation, letting you transmit and receive two frequencies simultaneously. P401 also has a wide RF range, spanning from 70 MHz to 6 GHz, which lets you test everything from Wi-Fi to 4-meter band, or both at the same time. Its powerful onboard FPGA means you can customize this module’s gateware and tune it to your liking.

P401 is well-suited for a host of different users. Whether you’re researching and need a high-end SDR, a student looking to tinker and learn, or need a versatile radio to embed in your next device, PZSDR P401 is an excellent choice.

Antennas Up

Expect high-level performance from PZSDR P401, as it’s designed to meet exacting standards of RF excellence. From low-latency drone communications to satellite radar and onboard video transmission, P401 covers a ton of the most demanding applications in the RF world. Not just for testing and measurement, PZSDR P401 has what it takes to let you develop for and validate against the next-generation of wireless protocols.

Features & Specifications

• RF Chip: AD9361
• Frequency Range: 70 MHz- 6 GHz
• Signal Bandwidth: 200 KHz - 56 Mhz
• Memory: 2 GB DDR4 (PS side), 1 GB DDR4 (PL side)
• QSPI FLASH: 256 Mb
• EMMC: 8 GB
• RF Clock: 40 MHz VCTCXO (0.5 ppm), also compatible with an external clock generator
• Ports： Gigabit Ethernet, USB Type-A 3.0, SFP(10G), MiniDP, SSD Interface, SD Card slot
• Form Factor:
  • Board: 148 x 100 mm (5.83 x 3.94 in)
  • With enclosure: 155 x 110 x 28 mm (6.10 x 4.33 x 1.10 in)

Block Diagram

Open Source

PZSDR P401 is meant to be easy to develop for, and in the spirit of that we will make the schematics PDF and a DXF structural diagram available under a permissible, open source license. Additionally, we’ll release bare metal test code, compatible firmware, OpenWifi test firmware, and more for people to access.

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