Project update 2 of 6
Lime Microsystems and Enjoy-Digital are expanding our collaboration with the launch of LimeSDR Mini 2.0. The FPGA switch from Intel MAX10 to Lattice ECP5 brings with it new opportunities to use open source toolchains and frameworks for the FPGA implementation.
The LiteX framework from Enjoy-Digital provides a convenient and efficient infrastructure to create FPGA cores/SoCs and to explore a wide range of digital design architectures, enabling many new possibilities. For example:
As a first step, Enjoy-Digital have already demonstrated a LiteX SoC built with a RISC-V CPU running on LimeSDR Mini 2.0. The design reuses the existing LiteX codebase. Initial LimeSDR Mini v2 support is already available in LiteX-Boards, a repository of FPGA board definitions supported by LiteX.
As a second step, Enjoy-Digital are now porting the "traditional" Verilog/VHDL design from Lime Micro to the LiteX framework. This step will allow reuse of all existing, validated cores from the original design, while doing the top-level integration with LiteX to greatly simplify build and customisation of the design for users. The plan is to have this completed by the time that the first boards ship in October.
The eventual goal will be to allow for a RISC-V CPU supported in LiteX, such as VexRiscv, to be implemented in the FPGA, with support for custom function units (CFU) that implement powerful features such as hardware accelerated DSP. This flexibility in the SoC and implementing hardware acceleration, combined with the availability of open source toolchains for the Lattice ECP5 (Yosys/NextPnr), could enable a vast range of possibilities for our community!
In the future, Enjoy-Digital is also planning to use LimeSDR Mini 2.0 as a platform for LiteX and SDR development, and will endeavour to re-implement the gateware design entirely using the LiteX framework.
Please note that the officially supported gateware will continue to be developed in the traditional way for the time being, while the LiteX gateware development is being carried out and is put through its paces with key SDR applications.