Embedded vision is one of the most exciting developments in today’s technology. It gives machines the ability to see, sense, think, and immediately respond to the real world.
RGGBer is a fully open source, low cost, modular development kit that makes embedded vision design easy! It provides all the necessary hardware resources and accessories to support 1080p @ 60 fps video applications. RGGBer is based on an FPGA which provides accessible programming, flexibility, and power.
|A||DC/DC modules, speaker, buzzer|
|B||OV5640 CIS modules, AF 60° lens and 120 ° lens|
|E||FPGA processor board|
|H||LCD add-on card|
|I||iXCtrl add-on card|
Freedom from repetitive tasks: You can quickly start on the specific features of an embedded vision product without having to worry about building and designing basic, low-level functionality.
Quick start: RGGBer saves you time and money by providing a well-developed FPGA framework and reference designs.
Open source: RGGBer is an open source platform, so you can contribute and share knowledge with others, resulting in faster development and more robust solutions.
In keeping with principles of open hardware, all documentation regarding the FPGA framework, high quality reference designs, etc., is freely available on GitHub. The RGGBer Team will continuously publish updates on GitHub during and after the campaign to keep pace with the latest development.
RGGBer provides reference designs in the following areas to help users get a quick start on their project. We’ll be sharing the details of these designs as updates during the campaign.
Usually, machine vision uses a combination of high-speed cameras and computers to perform complex inspection tasks in addition to digital image acquisition and analysis. Connected to an OV5640 CIS module, RGGBer provides:
The above two images illustrate auto focus with RGGBer.*
RGGBer uses the OV5640’s built-in ISP engine for AWB, AEC, AGC, and AF. It is user bypassable for those who wish to implement their own ISP modules in the FPGA.
The above two images illustrate RGGBer’s full HD capabilities.
RGGBer provides both HDMI input and output, so it is suitable for building video processing unit (VPU) cards. RGGBer can receive video from a laptop via HDMI and processes it with standard filter effects and other processing.
The above four images are examples of effects you can create with RGGBer.
RGGBer’s powerful FPGA allows you to apply multiple filters in real time.
Use alpha blending to overlay a scale line on the source video for real-time measurement.
Connecting several RGGBers together allows you to build image networks. The video source can come from a standard HDMI source or a real-time image.
When you install dual-camera monitoring on your car, RGGBer can serve as a DIY advanced driver-assistance system (ADAS). One camera monitors the back of the car and the other monitors front-left. With this setup, a user can quickly verify ADAS algorithms for LDWS, blind spot monitoring, car parking, etc.
Using RGGBer in an advanced driver-assistance system (ADAS).
Below is an endoscope prototype built with RGGBer. The CIS module uses MIPI output so a MIPI-to-DVP adaptor board was created to handle the conversion.
Prototype of an endoscope using RGGBer.
The limited RAM and fabric resources of a single FPGA are usually the bottleneck when developing large-scale embedded vision projects. RGGBer can solve this issue by connecting RGGBers together, which means a complete large FPGA project can be spread across more than one FPGA.
Multiple RGGBers can be connected to work in parallel.
The FPGA processor board and the video mainboard form the core of the RGGBer Dev Kit. The FPGA processor board connects to the video mainboard via two high-speed, board-to-board connectors. It expands the FPGA’s PLL clock outputs, dedicated global clock inputs, I/Os, and power pins to various applications. A detailed pin-out reference is available in the GitHub repo.
Mated FPGA Processor and Video Mainboard
Note: The purple dashed line in this diagram is functionality that will be added in the final deliverable version (rev 4). It indicates that the FPGA will be able to directly access the image sensor and the BLE4.0-to-UART module.
FPGA processor board dimensions: 68 mm x 60 mm
|A||back side, 100 pin high speed board-to-board connectors|
|B||USB 2.0 to UART, +5 V in: CP2102-GM|
|C||10-pin FPGA JTAG|
|E||FPGA chip: Altera Cyclone IV EP4CE30F23C6N/C8N|
|F||DDR2 chips: 2 x MT47H64M16HR, bandwidth up to 12.8 Gbps|
Video mainboard dimensions: 78 mm x 60 mm
|G||HDMI out type C: video only, pixel rate 165 Mhz, 1080p and WUXGA at 60 Hz, RGB 24 bits|
|I||Mixed-signal MCU C2 debug|
|J||HDMI in type C: video only, pixel rate 165 Mhz, 1080p and WUXGA at 60 Hz, RGB 24 bits|
|K||microSD card slot|
|L||100 pin high speed board-to-board connectors|
|M||DC +5 V in|
|N||BLE 4.0 to UART module for wireless control|
The iXHis, iXCIS, and iXCtrl interfaces serve as expansion interfaces to extend RGGBer’s functions for nearly limitless embedded vision applications.
iXHis is the interface that supports high speed channels that allow the user to easily connect to a USB 3.0 bridge chip, ultra high-speed image sensor, HDMI receiver chip and camera-link, etc. See in iXHis pin-out table.
iXCIS is the interface that supports mainstream CMOS image sensors and ISP chips. User is allowed to create add-on board based on specified sensors chip and optical lens. See in iXCIS pin-out table.
iXCtrl interface allows user to control all kinds of actuators. See in iXCtrl pin-out table.
As a vision device, RGGBer may need to be installed in a remote location such as in a security camera application. As such, it is necessary to support remote control. We have developed an Android app for this purpose which can control RGGBer remotely via the Bluetooth channel.
The app’s source code is freely available, and it supports multi-device connections and full duplex communications. The app provides a free typing zone to test RGGBer’s Bluetooth communications. We welcome users to develop and share their own protocols and implementations in the app. In addition, the app provides a complete GUI to control all the reference designs.
We’ve put together a few kits that bundle the RGGBer components needed for different kinds of machine vision development projects. We have kits for digital camera development, video processing card development, ADAS/multi-camera development, and a kit that bundles all the components in the RGGBer family.
The mixed-signal MCU is used for board-level configuration, image sensor initialization, Bluetooth protocol parsing, EDID write, etc. Those tasks are not usually timing critical, but they complicate sequential control. So assigning those tasks to MCU processing will save FPGA internal resources for high throughput processing. The C51 MCU is very basic and general and can be handled easily by most engineers. In addition, the mixed-signal MCU provides high performance analog channels to the iXCtrl port.
Compared to other solutions, RGGBer is less expensive, smaller, and, most importantly, provides technical capabilities other tools don’t.
|RGGBer||Zedboard||Terasic DE2-115||Terasic C3H|
|Frame buffer||DDR2, 256 MB||DDR3, 512 MB||SDRAM, 32 M x 32bits||DDR2, 256 MB|
|HDMI input||1080p, 60 Hz||NO||NO||NO|
|HDMI output||1080p, 60 Hz||YES||NO||NO|
|Onboard MCU||YES||ARM core||NO||NO|
|Independant FPGA processor board||YES||NO||NO||NO|
|USB to UART||YES||YES||YES||NO|
|Dimensions (mm)||78 X 60||160 X 134||210 X 156||190 X 167|
We’ve completed the first three revisions of the prototype in the past 18 months to optimize RGGBer. We will ship rev 4 to all backers. The major improvements between these prototypes will be presented in a campaign update.
We will share with you the details of further stretch goals in future updates.
RGGBer is fortunate because all of our supply chains, including our PCB suppliers, test lab, and component vendors, are based in China, where we are located. This will help reduce many possible sources of delay, including shipping issues.
As soon as the campaign has successfully concluded, we will manufacture and deliver according to this schedule:
deliverable. Update schematics, PCB layout, and BOM.
To date, we have completed three functional RGGBer prototypes. We feel that most of the design risks have been minimized.
Nonetheless, while unlikely at this point, it’s always possible a major bug could surface to cause a production delay. No matter the cause, we are committed to transparency and will notify backers immediately of any discovered risks or delays to the project.