Opal Kelly Pins is an interactive online reference for the expansion connectors on all Opal Kelly FPGA integration modules. It provides additional information on pin capabilities, pin characteristics, and PCB routing. Additionally, Pins provides a tool for generating constraint files for the Xilinx place and route tools.
You can access the SYZYGY Brain-1 Pins Reference online and do not need to sign up for an account to view the pin list and pin diagram or to export the constraints template.
Additional Pins capabilities include a pin search functionality and the ability to filter the pin list on a number of pin features such as clock-capable inputs and power pins. Clicking on a pin will bring up a diagram of the board as seen in the image below. Moving the mouse cursor over pins in the pin list will highlight the pin in the diagram to give an idea of where it is on the board. Creating a Pins account will allow you to create a custom peripheral configuration, enabling custom XDC constraints and pin names for each pin. This information will then be automatically included when generating a constraint file.
To learn more, please review our Pins Documentation.
We’re still on target to have our first production build delivered in early January. If all goes well, this puts us on a path to deliver ahead of schedule.
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