Funding ends on Jun 29, 2018 at 04:59 PM PDT (11:59 PM UTC)
"Today I’m launching ... the NeTV2 in the hopes of rallying like-minded developers, dreamers, users, and enthusiasts to help build the case that a small but important group of people can and would do more, if only we had the right to do so."
"The idea is to show that there’s demand for devices that are capable of providing innovative new features that are currently restricted by law in the United States."
"The board also includes PCIe 2.0 x4 connectors, allowing it to be used with a computer to offload work to an external GPU."
Currently, innovation in digital video is severly hampered by the legal restrictions of Section 1201 of the Digital Millennium Copyright Act (DMCA). The NeTV2 is an FPGA-based development board optimized for open digital video applications, and just like any other development board, the access capabilities of the NeTV2 are limited by the law. Relatedly, with the help of the EFF, I’ve filed a lawsuit against the US government to reclaim our rights to innovation and expression with all forms of digital video. As a backer of this campaign, you will not only get a great FPGA development board, you will also be helping to make the case that there is a real demand for the freedoms to innovate and express in digital video.
I’ve always wanted to build a digital video processing system. I freely tinkered with digital video throughout high school and college, but then the law changed. The passing of Section 1201 made it unlawful to process encrypted digital video feeds, even in the privacy of your own home. Now, with the help of the EFF, we’re asking the US government to restore the freedoms to innovate and express that America enjoyed when I was younger.
I designed NeTV2 with the hope of finding like-minded developers who want to develop video processing applications but have felt restricted by the current laws limiting our freedoms to innovate and express, especially when it comes to encrypted videos.
Section 1201 of the DMCA makes it illegal to circumvent access controls, such as encryption, on digital video content. The NeTV2 offers two operating modes, neither of which has the capability to decrypt video.
NeTV Quickstart Package in Enclosure
NeTV2 will ship to backers in “NeTV Classic Mode.” In this mode, the FPGA is configured with a bitstream that allows the NeTV2 to add encrypted pixels to an encrypted video stream, without ever decrypting the video stream. It does this by observing the initial cryptographic handshake between the the video source and video sink. So, for example, using NeTV Classic Mode, you could add an opaque text overlay to a live video stream, but you could not add a translucent text overlay, as that would require decrypting the original video stream to compute the alpha blending.
More technically speaking, NeTV Classic Mode is enabled by special hardware circuits that enhance the NeTV2’s ability to behave as an in-line video filter by dynamically intercepting and modifying display capability negotiations. This gives the NeTV2 the ability to dynamically fix “broken” display descriptors, attempt to force a known display resolution, and encrypt video for improved compatibility with a wide range of target systems.
The libre mode of NeTV2 is geared more toward developers. In this mode, the NeTV2 works only with unencrypted video feeds, but has full access to the entire video stream. This lets you arbitrarily manipulate pixels in real time, either onboard or by plugging into a host using the PCI-express 2.0 x4 interface for offboarding compute to a companion GPU or cloud service. The difference between libre and classic modes is simply the placemnet of two jumpers on the board and the bitstream in the FPGA. The NeTV2 does not ship in libre mode, but I will work with the developer community to support it and its applications.
In addition to classic and libre modes, the NeTV2 has several hardware features unrelated to either mode, but still of interest to developers. Specifically, the NeTV2 has a pair of additional inputs and outputs allowing it to function as a digital video switch, as well as a microSD card receptacle, USB micro Type-B port, and a 10/100 Ethernet port.
The NeTV2 circuit board is 100% open source, along with its companion case, and all of its reference code. The system is optimized for use with migen/LiteX, an open source Python-based hardware description language that is a front-end to Xilinx’s free-to-download-but-closed-source tools for synthesis, placement, and routing. migen/LiteX optimizations include an internal console UART and etherbone-over-Ethernet debug ports, as well as a JTAG interface that can be tightly coupled to a companion Raspberry Pi for dongle-free gateware development – just ssh in, and you’re ready to go. Finally, the optional plastic case is designed with developers in mind, featuring a Peek Array and a user bezel that’s friendly to both additive and subtractive methods of modification. Let’s bring open video to the digital age!
|Cost||USD $200||USD $150||USD $349||USD $419||USD $499||USD $539||USD $2,995|
|Max BW ||25.6 Gbps||N/A||12.8 Gbps||12.8 Gbps||12.8 Gbps||12.8 Gbps||38.4 Gbps|
|Size||512 MB||N/A||256 MB||128 MB||512 MB||128 MB||384 MB|
|Outputs||2 ||0.5 ||2||2 ||1||1||1|
|JTAG||Yes||Yes||Yes ||Yes ||Yes||Yes||Yes|
|Ethernet||100 Mbit||No||Gigabit||Gigabit||Gigabit||100 Mbit||Expansion|
|Config Storage||8 MByte SPI||Host SD||16 Mbyte SPI||16 Mbyte SPI||32 Mbyte SPI||16 Mbyte SPI||16 Mbyte SPI|
|High-Speed Expansion||4x PCIe-2.0||No||TOFE||VHDCI||FMC LPC||No||3x FMC LPC, 1x FMC HPC|
|Discrete CPU||Rpi 3B+ 4 x 1.4 GHz option||PXA168 1 x 800 MHz||No||No||No||No||No|
Since the campaign has already reached its funding goal, we’ve been thinking about stretch goals. The first stretch goal is a free Tomu bundled with every NeTV2, the second stretch goal is a free thermal management kit, and the third stretch goal is a significant FPGA upgrade for everyone who opted for the more powerful FPGA.
Developers for the original NeTV had to till hard earth as the nearly decade-old system was designed long before the maturation of embedded Linux. The best option we had at the time for creating packages was rolling our own distribution using Open Embedded, and the choice to adopt the PXA168 dramatically lowered costs but also locked developers into a poorly supported kernel and no upgrade path for CPU performance.
NeTV2 learns from these hard lessons. As much as possible, NeTV2 relies upon community-supported software tooling. For example, instead of integrating a SoC onto the same board as the FPGA, we opted to give users a choice of any Raspberry Pi-compatible SBC, or plugging into an x86 host via PCI express. The Quickstart Package integrates the Raspberry Pi 3B+, but any Pi-compatible single board computer could be plugged in, enabling users to balance price, performance, and compatibility based on their own unique requirements.
The decision to include the Raspberry Pi 3B+ in the Quickstart Package means that turnkey NeTV2 users get to enjoy the well-supported Raspbian distribution, including a choice of browsers and a mature set of system and network configuration tools. We’ve also abandoned the custom IR remote control in favor of USB ports, so you can plug in a keyboard and mouse to handle all of the initial configuration and setup for your network environment instead of poking around with a seven-button remote control.
For final deployment, there’s also a number of community-supported options and guides for configuring a Raspberry Pi into “kiosk mode”, so that on boot it goes straight into rendering your application code.
The upshot is that software development for the NeTV2 should be much easier than on the original NeTV: basically, if you can set up a Raspberry Pi and build a web page where the background is set to the chroma key color, you’ve got an NeTV2 application.
Configuring the video pipeline and the FPGA itself is also easier than ever thanks to the migen/LiteX tooling. The FPGA now runs its own embedded CPU, meaning the FPGA can be much smarter about managing itself, and any configuration commands are sent over a UART interface. This is in contrast to the original NeTV where the host CPU had to run complex daemons to manage the FPGA, and commands were sent to the FPGA via a custom set of I2C drivers.
Yes, you heard it right. The NeTV2 supports migen/LiteX, a Python-based framework for describing hardware designs, along with a set of core libraries to turbocharge your development process. Synthesis, place and route, and bitstream generation still rely on the Vivado toolchain. However, Clifford Wolf completed a fully working FPGA flow called icestorm for the Lattice FPGA, and he is now leading the development of a fully open source alternative for every FPGA, including the Xilinx Artix-7 used in the NeTV2.
In a nutshell, migen/LiteX offers a faster, more compact solution than the Vivado core IP tools, and has the benefit of being properly open source, with a small but very active and very high-powered developer community. While I myself am not a native Python coder, I’ve managed to wrap my head around the framework and become more comfortable with it over the past few months. If you’ve always wanted to dabble in hardware, but have only ever written software, the NeTV2 could be just for you.
Check out this blog post for more details on why I decided to adopt migen/LiteX for the NeTV2. And if you’re a hardware developer who has never touched Python, never fear – I’m cooking up a document that can help you wrap your head around the migen/LiteX methodology. You can check out the work in progress at the LiteX-buildenv wiki.
Plastic cases can be tricky to design, and expensive to tool up for production. As a result, most development boards don’t come with an option for a plastic case. This adds an extra step between you and your end users that can seem insurmountable, especially in small volumes. I’d like to break that mold and reduce the barrier betwen you and your user community.
I designed the plastic case for NeTV2 to be optimized for the application of in-line video filtering, but open-ended to other possibilities. The case is provisioned with extra empty space, and a Peek Array – an array of M2.5 mounting bosses on an interleaved 30 mm grid. These extra bosses enable you to add an extra board or feature to the system without having to redesign the entire case.
The Peek Array (foreground) provides extra bosses so you can add small boards or features without having to redesign an entire case.
Furthermore, the front bezel is left entirely blank, and is specifically designed to be friendly with both subtractive and additive fabrication processes. Got a basic 3D printer? No problem, the bezel design is easy to 3D print – no fine features, no crazy overhangs filled with support material. Got a laser cutter? Also no problem, you can cut your own bezels out of acrylic stock and mount them, thanks to the dual retaining rings on either side of the case. When you’re ready to scale up, I’m happy to sell you the rest of the plastic parts so you only need to tool up the front bezel, reducing your barrier to production by about an order of magnitude.
A simple design and multiple optional mounting features allows the front bezel to be re-fabricated using a number of techniques.
This way, you can easily add extra ports to your NeTV2, breaking out the internal video ports, routing out Ethernet, or even adapting the fast GTP transceivers on the PCI-express port with a simple breakout board to totally different physical standards that are electrically compatible, such as SATA or DisplayPort (you would, of course, have to design the corresponding logic inside the FPGA for your crazy new applications).
Like any FPGA development board, the lawful limit of the NeTV2’s capabilities is ultimately up to the courts. In particular, Section 1201 of the DMCA makes it illegal to circumvent the protection on encrypted video feeds for almost any practical purpose, including filtering, enhancing, or modifying the video. Sadly, the NeTV2’s “libre” mode can only be used with video feeds that are unencrypted, severely limiting the utility of libre mode applications.
With the help of the EFF, I’ve filed a lawsuit against the US government to reclaim our rights to innovation and expression with all forms of digital video.
Opposition to our lawsuit argues that the status quo provides ample room for innovation: the absence of an open video development community is being equated to a lack of interest or need for such freedoms. Help us break this circular argument and share with the world what you would do with open access to all forms of digital video by adding an Issue in this git repo. Even if you’re not a developer, share your ideas on social media, and, if you have the means, please back our campaign today and leave a comment about what gets you excited about the possibilities of legal, fair-use access to all forms of digital video.
Your support matters: not only does it help pay for hardware, but it shows the world in no uncertain terms that this issue matters.
Interested in helping, but the NeTV2 isn’t the right platform for you? Please consider donating directly to the EFF!
The NeTV2 design targets two major use scenarios which I refer to as “NeTV classic” mode (video overlays with encryption) and “libre” mode (deep video processing, but limited to unencrypted feeds due to Section 1201).
In NeTV classic mode, the board is paired with a Raspberry Pi or similar single-board computer, which serves as the source for chroma key overlay video, typically rendered by a browser running in full-screen mode. The Raspberry Pi’s unencrypted HDMI video output is fed into the NeTV2 and sampled into a frame buffer, which is “genlocked” (e.g. timing synchronized) to a video feed that’s just passing through the FPGA via another pair of HDMI input/outputs. The NeTV2 has special circuits to help observe and synchronize with cryptographic state, should one exist on the pass-through video link. This allows the NeTV2 to encrypt the Raspberry Pi’s overlay feed so that the Pi’s pixels can be used for a simple “hard overlay” effect. NeTV classic mode thus enables applications such as subtitles and pop-up notifications by throwing away regions of source video and replacing it entirely with overlay pixels. However, a lack of access to unencrypted pixels disallows even basic video effects such as alpha blending or frame scaling.
NeTV's Classic Mode
In Libre mode, the board is meant to be plugged into a desktop PC via PCI-express. Libre mode only works with unencrypted video feeds, as the concept here is full video frames are sampled and buffered up inside NeTV2 so that it can be forwarded on to the host PC for further processing. Here, the full power of a GPU or x86 CPU can be applied to extract features and enhance the video, or perhaps portions of the video could even be sent to to the cloud for processing. Once the video has been processed, it is pushed back into the NeTV2 and sent on to the TV for viewing. Libre mode is perhaps the most interesting mode to developers, yet is very limited in every day applications thanks to Section 1201 of the DMCA. Still, it may be possible to craft demos using properly licensed, unencrypted video feeds.
NeTV's Libre Mode
The reference “gateware” (FPGA design) for the NeTV2 is written in Python using migen/LiteX. I previously compared the performance of LiteX to Vivado: for an NeTV2-like reference design, the migen/LiteX version consumes about a quarter the area and compiles in less than a quarter the time – a compelling advantage. migen/LiteX is a true open source framework for describing hardware, which relies on Xilinx’s free-to-download Vivado toolchain for synthesis, place/route, and bitstream generation. There is a significant effort on-going today to port the full open source FPGA backend tools developed by Clifford Wolf from the Lattice ICE40 FPGAs to the same Xilinx 7-series FPGAs used in NeTV2. Of course, designers that prefer to use the Vivado tools to describe and compile their hardware are still free to do so, but I am not officially supporting that design methodology.
The NeTV2 mainboard and case will be produced by AQS in Dongguan, China. AQS has already produced the first prototypes of NeTV2, along with the 3D printed cases featured in this campaign. The pricing for this campaign is based off of cost estimates from this supply chain. I have partnered with AQS for over a decade, and together we have a proven track record of delivering results on-time, including Novena and Chibitronics.
Currently, the design is at the “DVT” stage, which means it’s feature-complete and everything seems to wiggle like it should, but some items are pending a thorough validation. No new features will be added to the base design from this point forward, and ideally the only changes made are either small bug fixes, cost improvements, or reliability improvements.
We anticipate spending about an additional six months in the DVT phase before going into production. Tooling takes about two months, and component lead times can be as long as three to four months. Assembly and production, once all the components are gathered, can be finished in about one month, but it’ll take two additional months to finish the test fixtures for a product with so many high performance features. This, combined with a one-month dead period for Chinese New Year in 2019, means the 90% confidence date for delivery is sometime around late May 2019.
The orders will ship from Portland Oregon, including shipments destined for Europe and Asia. That’s why there is an additional international shipping surcharge. The shipping fee is on average less expensive to you than us engaging an importer or local distributor, as they would add a hefty markup on top of the product cost for their services, especially at such low volumes.
Please note that you will be responsible for any duties or taxes levied by your country, and under no circumstances will Crowd Supply under-declare the value, or mark parcels as “gifts” to avoid duties and taxes.
For more information about Crowd Supply’s fulfillment and payment polices, please visit Crowd Supply’s page about ordering, paying, and shipping.
Manufacturing hardware is always a risky venture. Especially today, the component market is volatile. For various interesting reasons, demand has been outstripping supply for everything from ceramic capacitors to silicon wafers, leading to shortages that are extending lead times and raising prices. I’m constantly monitoring these factors, and you will be the first to know if something unusual comes up that I haven’t already anticipated.
The global political situation is also volatile today. The risk of a trade war and punitive tariffs hang over US-China relations, and the risk of a large-scale military conflict is higher than usual. These factors are largely out of my control, but could have a significant impact on my ability to deliver on campaign promises.
Finally, and most significantly, this campaign is related to a lawsuit against the US government to reform Section 1201 of the DMCA. Because of this, there is a risk that someone may attempt to challenge the legality of the NeTV2 project. While it is our belief that the NeTV2 project is entirely lawful, we cannot predict the kinds of legal challenges that may lie ahead. Should we encounter any challenges, we will let you know via campaign updates. Proceeds from the campaign my be dedicated toward fighting off such challenges, and should we not prevail, we will also have to comply to any orders of the court which may include forfeiting some or all of the funds. A bad outcome would, of course, prevent us from fulfilling some or all of our campaign promises.
However, I wouldn’t be taking such a risk if I didn’t think it wasn’t a cause worth fighting for; by backing this campaign, you’re not only supporting a product, you’re supporting a worthy cause.
In compliance with Section 1201 of the DMCA, none of the reference designs provided for the NeTV2 will facilitate the access of encrypted video feeds. Furthermore, we will not provide any hints on how to develop decryption applications, and we discourage anyone from developing such applications. Instead, please tell the world why you need access to the encrypted video, so we can help make the argument to the US government as to why the freedom to innovate and express is so important.
The NeTV is an open video development board launched in 2011 which was the first product to demonstrate the encryption and overlay capabilities of “NeTV mode”. This board was highly cost-optimized – limited to 720p resolutions, had no frame buffering, and incorporated an 800 MHz single-core ARM CPU with 256 MB of RAM. NeTV2 is the successor to NeTV, and can support 1080p60 resolutions with frame buffering, and via an optional Rasbperry Pi 3B+ provides a quad-core 1.4 GHz CPU with 1 Gbyte of RAM for rendering video overlays. It also incorporates a few extra developer-oriented hardware features, such as additional video ports, USB ports (via the Rasbperry Pi 3B+) and an FPGA-native Ethernet port. The plastic case was also redesigned to be larger, making it easier for developers to modify and add extensions.
The original NeTV2 concept shared in 2016 was crammed into a tiny mini PCI-express card. After a brief round of alpha-testing with various early adopters, I realized that smaller and lower cost was the wrong direction to go for developers. Furthermore, the rise of M.2 had made PCs which supported mini PCI express fairly rare, and migrating the design to the even smaller M.2 format ran counter to the most developer’s demands for more expansion capabilities. As a result, the original design was completely scrapped, and the current form factor, referred to internally as the NeTV2MVP, was designed from a clean sheet, adding more HDMI ports and unlocking all of the GTP-capable I/Os in a half-sized PCI express card format.
The live video translation demo hinted at in the campaign video is just a demo. The reference design for NeTV2 will feature the capability to use chroma-key to overlay graphics on top of a video stream, similar to the original NeTV’s capabilities. The overlay video could come from any source, but nominally it’s generated by a browser running on a companion Raspberry Pi 3B+, and piped into the FPGA via a small HDMI jumper cable.