BeagleWire is a completely open source FPGA development board. Unlike most other FPGA dev boards, the BeagleWire’s hardware, software, and FPGA toolchain are completely open source. The BeagleWire is a Beaglebone compatible cape based on the Lattice iCE40HX FPGA. BeagleWire can be easily expanded by adding external modules such as, for example, modules for high speed data acquisition, software-defined radio, or advanced control applications. Using common connectors like Pmod and Grove makes it possible to connect various interesting external modules which are widely available in stores. This makes prototyping new imaginative digital designs easier.
BeagleWire caters to open source and open hardware enthusiasts. All of its schematics, software, and examples are totally open. Feel free to use them and share with others. The BeagleWire can be a great learning tool in an educational environment that teaches FPGAs, Verilog, and Linux kernel driver concepts. It allows users to break away from large, proprietary FPGA toolchains by allowing the use of the open source Icestorm toolchain. The IceStorm toolchain is lightweight so it can be installed on various platforms. Users can synthesize their Verilog code on BeagleBone without installing any additional software on their computer. Project Icestorm uses the Yosys synthesis suite and Arachne-PNR to generate programmable bitstreams. BeagleWire integrates closely with the BeagleBone Black and has the backing of the Beagleboard.org community. Thanks to that, a new user can receive help from more experienced members of BeagleBoard.org.
|A. Lattice iCE40HX4K - TQFP 144 Package||B. Power section|
|C. 2x20 BeagleBone P8 Connector||D. PMOD4|
|E. PMOD3||F. Grove 4|
|G. Grove 3||H. 32 MB SDRAM|
|I. Grove 2||J. 4 MB SPI Flash|
|K. Grove 1||L. PMOD 2|
|M. 8 KB EEPROM||N. 100 MHz Clock Oscillator|
|O. PMOD 1||P. 2x20 BeagleBone P9 Connector|
|Q. 2 Dip Switches||R. 4 Blue LEDs|
|S. 2 Push Buttons||T. Reset Button|
Once you have your BeagleWire, here are some links to get you started:
|FPGA||Lattice iCE40HX-4k||Lattice iCE40HX-1k||Lattice iCE40HX-4k||Cyclone® IV EP4CE22F17C6N|
|User Memory||32 MB||N/A||4 MB||32 MB|
|Clock||100 Mhz||12 Mhz||100 Mhz||50 MHz|
|Open Source Software||yes||yes||yes||no|
|Compatibility with BeagleBone||yes||no||no||no|
|Extensibility||4 x Pmod + 4 x Grove||1 x Pmod||4 x Pmod||2 x 40-pin Headers (GPIOs) + Arduino Connectors|
|Fast access via GPMC port||yes||no||no||yes|
|Hardware noise debouncing for push buttons||yes||N/A||N/A||no|
|User Interfaces||4 x LED + 2 x push button + 2 x DIP switch||5 x LED||3 x LED||8 x LED + 2 x push button & 4 x DIP switch|
|Open Source Hardware||yes||no||yes||no|
Communication between BeagleWire and BeagleBone Black is over the GPMC port. This is a simple and efficient solution. The GPMC port has 16 lines width and its maximum clock frequency is 100 Mhz. After installing BeagleWire on BeagleBone, the required Device Tree Overlay is loaded automatically. By using simple components written in Verilog, FPGA logic is mapped to the processor’s external bus, allowing access using simple read and write operations. A Linux driver or an application written in any programming language allows for communication. The BeagleWire software repository contains a lot of ready-to-use solutions and simple examples.
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