UltraMiner FPGA is part of the Molex Stay Connected Design Challenge 2019!

Affordable, Powerful, Easy-to-Use, Energy Efficient, and Versatile

If you’re in the market for a re-programmable cryptocurrency miner, look no further. UltraMiner FPGA delivers power, efficiency, and convenience at an affordable price. And if you don’t want to mine crypto, but you do want a development board that showcases not only the prototyping potential but also the speed of a modern FPGA, then you too have come to the right campaign.

Below are a few of UltraMiner’s key features:

• Fast: Built around the latest 16 nm Xilinx Kintex UltraScale+ FPGA, two generations newer than most other FPGA boards
• Versatile: Bitstream designs for multiple mining algorithms
• Resourceful: 356,000 logic cells, 26.2 Mb of on-chip RAM, and 1,368 DSP slices
• Strong Power Output: 60 W maximum power output with dynamic voltage monitoring and control
• Effective Cooling: Compatible with both Intel LGA115x CPU coolers and smaller, 40x40 mm heatsinks
• Easy to Use: A single USB cable handles all operations
• Abundant IO: JTAG and LVDS compatible GPIO headers (PCIE Gen3 x4 and additional GPIOs in the Developer Edition)
• Open Source: Open source bitstream Register-Transfer Level (RTL) designs, mining software, peripheral drivers, and developer documentation
• Affordable: UltraMiner costs a fraction of what you would pay for an FPGA miner or dev board with a similarly cutting-edge processor

Technical Specifications

• Processing
  • Xilinx Kintex UltraScale+ KU3P
    • System Logic Cells: 356,000
    • DSP Slices: 1,368
    • Memory: 26.2 Mb
  • 125 Mhz ultra low jitter crystal
• Power Management
  • 1x PCIe 6-pin Power Adapter
  • TI high efficiency PMIC with 60 W Max power output
  • Cooler/Heatsink sockets compatible with LGA115X (90x90 mm) & North Bridge (40x40 mm)
• Connectivity
  • 1x Micro USB to I²C, SPI and 2x UART (FT2232H)
  • 1x JTAG port
  • Standard Edition: 2x GPIO pinout connectors (Adafruit part 2223)
    • 16 HPIO pins (1.8 V, higher speed, up to 8 LVDS pairs)
    • 16 HDIO pins (3.3 V, lower speed, up to 8 LVDS pairs)
  • Developer Edition: PCIe x4 Gen 3 & 6x GPIO pinout connectors (Adafruit part 2223)
    • 50 HPIO pins (1.8 V, higher speed, 16 LVDS pairs + 18 single ended)
    • 50 HDIO pins (3.3 V, lower speed, 16 LVDS pairs + 18 single ended)
• Other Peripherals
  • 1x SPI Flash (128 Mb)
  • 2x Programmable LEDs (4x Status LEDs)
  • 1x Pushbutton
• Software
  • Free WebPACK license for Vivado Design Suite
  • Pre-built algorithm bitstream files included
  • Open Source bitstream and mining host software
  • C library provided for power management, FPGA bitstream programmer
  • Cross platform support on Mac OS, Windows, Linux and Embedded Linux (Raspberry Pi)

Using UltraMiner to mine cryptocurrency

Building a mining rig around a Graphics Processing Unit (GPU) can be fun, but GPUs are designed to power computer displays, not mining algorithms. Turning one into a functional miner requires that you invest in an entire PC setup. At a minimum, that includes the CPU, the memory, a hard drive, a motherboard with PCIe support, and a power supply. Each of these components increases the cost of your rig and expands its footprint. And because modern GPUs have thousands of cores, and are designed to consume as much power as possible in order to outperform their competitors, your reward for all of this work is a flaky, inefficient miner that’s prone to overheating.

GPU Mining Rig

Custom-built Application Specific Integrated Circuit (ASIC) rigs are the gold standard for cryptocurrency mining. They are quite expensive, however, and they only work on the algorithms for which they were designed. You can think of an FPGA as a reconfigurable ASIC. With the right algorithm implementation, an FPGA can match the efficiency of an ASIC miner, which is often about ten times the performance-per-Watt of a GPU rig. Better yet, your FPGA miner won’t turn into a paperweight if the algorithm for the cryptocurrency you are mining is updated or if you decide to start mining something else.

And because UltraMiner is designed to be a standalone device, it does not require that you invest in a desk full of peripheral components. Its small form factor and flexible cooling options allow you to set it up and plug it in virtually anywhere. This is already true of the UltraMiner prototype shown below:

UltraMiner Prototype

And we’ve optimized the latest design to support a somewhat less imposing CPU cooler:

Best Performing 16 nm Xilinx FPGA on the Market

UltraMiner is equipped with the latest Kintex UltraScale+ KU3P FPGA, which is from the same TSMC FinFET 16 nm process technology that powers the Bitmain Miner S9 ASIC miner. UltraMiner can achieve ASIC-like mining performance at one quarter of a GPU miner’s power consumption.

Comparative Features of Re-programmable Mining Rigs

* - Depends on the specific model. See the following table for more detail

** - Device alone. Does not include the cost of peripherals

Multiple Open Source Mining Algorithms, Free of Charge

UltraMiner supports multiple cryptocurrency mining algorithms. We have already developed and validated several using our prototype boards, and we plan to develop more. When we do, we will publish them free of charge.

* - UltraMiner supports dual voltage operation (0.85 V or 0.75 V)

Power Management & Frequency Control

UltraMiner comes with full-featured power and frequency-control software that can dynamically update the FPGA’s core voltage and core hash frequency, allowing you to find the perfect balance between performance and energy efficiency. The KU3P supports a wide core voltage range, as well. Working with a Keccak (SHA-3) mining algorithm, our internal test results show that increasing core voltage to 0.95 V, from the nominal 0.85 V, boosts performance by almost 25%:

This works in the other direction as well. Decreasing supply voltage to 0.65 V reduces power consumption by over 45% without a significant drop in mining performance:

Open Source & Open Community

We are fed up with closed mining projects that benefit only a select few and with companies that demand license fees for periodic bitstream updates. We seek to provide an alternative to both. We support the open source movement, particularly within the crypto-mining community, where openness and transparency are key foundational principles. In order to help strengthen that community, we intend to open source:

• The RTL bitstream design source for our mining algorithms
• Our mining host software
• Our dynamic power monitoring and management software
• Our board schematics
• A board-support package that makes it easy to reprogram UltraMiner's FPGA using the Vivado Design Suite from Xilinx

With the source code package we provided, you can easily build a mining algorithm like the one shown below:

Cryptocurrency Miner Comparison Table

UltraMiner GPIO Pinout

Using UltraMiner as a High Performance FPGA Dev Board

Whereas most affordable FPGA development boards are designed with Xilinx 7 Series (Artix-7 and Kintex-7) chips from 2010, UltraMiner is built around the latest Kintex UltraScale+ FPGA, which is two generations newer. The high performance, low-power semiconductor process of the Xilinx UltraScale+ (TSMC 16 nm FinFET+) yields between 2 and 2.4 times the performance-per-Watt of the Kintex-7’s 28 nm process nodes:

Our own internal testing shows performance gains and power savings that are even better than the manufacturer’s marketing data. The same implementation of the Keccak (SHA-3) hash algorithm ran 82% faster on a KU3P than it did on a 7-series Kintex with similar logic resources, all while consuming 36% less power:

A Strong, Flexible Power Supply

UltraMiner includes a powerful TI PMIC that can supply up to 60 A to its core power rail. That’s three times the load of a typical FPGA dev board. As with other computationally intensive FPGA designs, power is central to cryptocurrency mining. Due to the high resource utilization rate of our designs (sometimes up to 95% LUT utilization), we found ourselves constantly running up against the limitations of our on-board PMIC.

Internal testing showed that designs running on the UltraMiner prototype – with full FPGA resource utilization and at the maximum PLL frequency of 900 MHz – required more than 50 A on the core FPGA power rail, but we struggled to find an FPGA dev board with a PMIC that could provide more than 30 A of current load. So we made our own. With UltraMiner, not a single hardware resource will go to waste due to the limitations of your power supply.

UltraMiner’s PMIC also supports dynamic voltage output monitoring and adjustment. This feature is quite powerful when combined with the benefits of the TSMC 16 nm FinFET+ process, which allows the UltraMiner’s KU3P to operate at different supply voltages depending on the requirements of a particular application. For the absolute best performance, you can operate the devices at its nominal supply voltage of 0.85 V, but applications with tighter power constraints can operate at 0.75 V while consuming up to 30% less power.

Vivado Design Suite, Free of Charge

UltraMiner’s KU3P is one of only two FPGA models in the UltraScale+ family for which Xilinx provides a free license to use the full-featured WebPACK version of its Vivado design suite.

If you want to learn how to program UltraScale+ hardware – which is widely used in industrial and scientific applications due to its feature set and performance characteristics – UltraMiner is likely your most affordable option. And even if you’re not an RTL programmer, that Vivado license can still help you out:

"Vivado High-Level Synthesis, included as a no cost upgrade in all
Vivado HLx Editions, accelerates IP creation by enabling C, C++ and
System C specifications to be directly targeted into Xilinx
programmable devices without the need to manually create RTL."

FPGA Dev Board Comparison Table

In today’s market, FPGA manufacturers have a great deal of control over the prices at which global distributors can sell their chips. As you can see in the comparison table below, most UltraScale+ FPGA boards are outrageously expensive. We have gone through a long process of negotiation – both with our supplier and with Xilinx – to reach a price point for the KU3P that allows us to keep UltraMiner affordable. We were able to do so in part because of demand within the cryptocurrency community and among FPGA developers.

UltraMiner Developer Edition with Extensive IO

Whatever your FPGA design project might be – whether it’s related to crypto-mining, software-defined radio, cryptography, machine learning, or some other high performance application – a Kintex UltraScale+ FPGA can help you turn the crank more times per second. In fact, depending on the nature of that application, you might find yourself out-pacing the GPIO and MicroUSB interfaces on the Standard Edition of UltraMiner.

If IO bandwidth is a priority for you, have a look at our Developer Edition, which includes support for PCIe x4 Gen 3 and 100 high speed GPIOs broken out to standard-pitch headers. The Developer Edition of UltraMiner is perfect for designing PCIe-based solutions (and Xilinx has plenty of PCIe-related IP for you to explore). Or you can design your own high-performance DSP core. With enough IOs connected to an all-in-one ADC/DAC chip like the AD9363, UltraMiner’s UltraScale+ FPGA is just what your SDR project needs.

UltraMiner Developer Edition Pinout

Block Diagram

Note: Open-source software and libraries provided to support the hardware modules in green

Project Status

UltraMiner has passed the Engineering Validation Test (EVT) stage, which means that our engineering prototype is built, and major functionality has been validated. Our engineering work is not 100% complete, however. To facilitate easier testing, the current design routes all IO from the FPGA through the FPGA Mezzanine Card (FMC) connector.

In the next stage – Design Validation Testing (DVT) – we will produce a new prototype with PCIe and GPIO breakout connectors. That design will be identical to the final product outlined on our campaign page. This is a very low risk update, comparable to design changes that our team has made dozens of times before. Beyond that, our only planned modifications are minor optimizations and cost reduction efforts.

Manufacturing Plan

UltraMiner boards will be manufactured in Colorado, USA. AAPCB produced the prototype shown on the campaign page, and we have partnered with them for years. Together, we have a proven track record of delivering results on time. We have also partnered with factories in Portland, Oregon, so we have a backup plan if we run up against scheduling conflicts with AAPCB.

The advantage of manufacturing in the US is that we can attend to any issues in timely fashion and without worrying about customs paperwork and trade relations between the US and China. The downside of this decision is a higher cost per board and a longer turnaround time. If there is enough interest in UltraMiner – likely over 500 orders – we may consider moving the PCB production to China and only having the final boards assembled in the US (as our FPGA supplier is US-based).

We anticipate spending about two months in the DVT phase before going into production, which should take about another two months. Overall, it may be four to five months before the final product is delivered to backers:

• Two month to finalize the design and build a second batch for prototyping. This will include both standard and developer editions of UltraMiner. All features are expected to be implemented and fully tested. We will be sending some boards to early beta testers for feedback and reviews.
• One month for an early production run. At this point, we will order all of the components needed for the final production run, build another small batch for final testing, and ensure that there are no issues with the production process.
• One month for for final production and assembly. Products will be shipped to Crowd Supply facility for fulfillment.

Support & Documentation

You can reach us for support through Crowd Supply or by email at dev@agilmine.com. We are also active on the bitcointalk.org forum, under the name arm_race, and on Discord.

For source code and documentation, please see our GitHub repositories. They currently contain our mining host and bitstream file flash programming software. By the end of the campaign, we will also publish the RTL bitstream design source for our mining algorithms, a User’s Guide, schematics, and board-support documents.

If you’re looking for an overview on FPGAs and cryptocurrency, have a look at the following short articles:

• FPGA Mining: Overview and Applications from Arrow
• What is FPGAs - Next Era of Mining from ihodl.com
• GNU Radio and MIMO SDR: How FPGA Processing Can Reduce Communication Bandwidth Requirements, from nutaq. Aan overview of FPGA processing configuration for Software-Defined Radio (SDR) applications

Shipping & Fulfillment

All orders will be shipped by Crowd Supply from their facility in the United States. This includes international shipments, for which an additional surcharge will be added at checkout. On average, that surcharge is less than it would cost us to engaging an importer or local distributor, as such services add a hefty markup on top of the product cost for their services, particularly when shipping low volume.

Please note that you will be responsible for any duties or taxes levied by your country, and under no circumstances will Crowd Supply under-declare value, or mark parcels as "gifts" to avoid duties and taxes. For more information about Crowd Supply’s fulfillment and payment polices, please visit the Ordering, Paying, and Shipping page of the Crowd Supply guide.

Risks & Challenges

Manufacturing hardware is always a risky venture. The component market is volatile, especially these days, and the global political situation is unpredictable. For various reasons, demand has been outstripping supply for everything from ceramic capacitors to silicon wafers, which has led to shortages that are extending lead times and raising prices. By choosing a US-based FPGA supplier, we can minimize the potential impact on our manufacturing and delivery plans should US-China trade relations deteriorate.

As described above, we intend to make a few small design changes before our final production run. These include:

• Adding PCIe and routing out additional GPIOs for the Developer Edition of UltraMiner
• Re-arranging component placement to better support certain LGA115X CPU coolers
• Removing redundant components to reduce material cost

While these are all straightforward changes, any design update has the potential, however unlikely, to prolong the development cycle.

About Agilmine

Openness, trust, and transparency – while core values to many cryptocurrency enthusiasts – are in short supply within the crypto-mining hardware industry. We would like to change that. Not only through transparent funding and open hardware, but by helping to build a trusted community that can maintain algorithm updates and perhaps even develop new algorithms for the hundreds of thousands of Altcoins that exist.

We are a group of hardware and software engineers who are enthusiastic about cryptocurrency mining. We set up rigs at home and then proceeded to scale them past the point where they became inconvenient and right up to the edge of physical discomfort. So we began researching FPGA miners. Unfortunately, very few dev boards can deliver the power required by mining algorithms, so we didn’t have much luck. We did, however, have quite a lot of experience in the semiconductor industry – on both the hardware and the software sides of the business – so we decided to build our own.

One thing we love about open design, open source software and crowdfunding is the way in which they facilitate direct communication between engineers and their users. We want to bring that dynamic to the world of cryptocurrency mining, but we need your help to do it!