XYNC

The ultimate low-cost massive MIMO SDR, with up to 32x32 transmit/receive channels

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If you’re working on a massive MIMO system or have a large swath of spectrum you need to monitor, XYNC (pronounced iks-sync) is right for you. XYNC builds on the success of the Octopack SDR we offered during the XTRX campaign and takes into account feedback from the original Octopack users. XYNC comes in the following variations:

XYNC Model Included XTRXs Transmit Receive
XYNC Quadro 4 8 channels (4 independent pairs), 30 MHz - 3.7 GHz 8 channels (4 independent pairs), 30 MHz - 3.7 GHz
XYNC Quadro 6 GHz RX 4 8 channels (4 independent pairs), 30 MHz - 3.7 GHz 8 channels (4 independent pairs), 1.8 GHz - 6 GHz
XYNC Octo 8 16 channels (8 independent pairs), 30 MHz - 3.7 GHz 16 channels (8 independent pairs), 30 MHz - 3.7 GHz
XYNC Octo x2 16 32 channels (16 independent pairs), 30 MHz - 3.7 GHz 32 channels (16 independent pairs), 30 MHz - 3.7 GHz

You can connect together two XYNC boards if you either want to increase the number of RX/TX channels (e.g., two XYNC Octos give you 32 TX and 32 RX channels) or want to increase throughput per channel (e.g., two XYNC Quadros give you twice the throughput of a single XYNC Octo). Connecting more than two XYNC boards is also possible, but requires an external clock and 1pps signal distribution circuitry (not provided as part of this campaign).

XYNC (back)

Synchronized and Multiplexed XTRXs

A single XYNC comes equipped with four or eight removable XTRX boards, metal installation brackets, cables for all of the TX/RX ports and the GPS port, and a special board for synchronizing the XTRX units. Each onboard XTRX provides two transmit channels and two receive channels. Thus, XYNC Quadro (with four XTRX units) has eight transmit and eight receive channels, and XYNC Octo (with eight XTRX units) has 16 transmit and 16 receive channels. Two XYNC Octo can be synchronized and will give you 32 transmit and 32 receive channels.

On the digital side, each XTRX unit is connected to a PCIe switch which multiplexes the XTRX PCIe lanes into a single PCIe 2.0 x4 connector. This makes it easy to install into a standard PC in a very compact way - just don’t forget to provide enough air flow for cooling, as it can get quite hot.

A single XTRX is shown above. XYNC includes up to eight XTRX boards.

XYNC Simplified Block Diagram

XYNC simplifed block diagram (without phase sync loopback)

XYNC Full Block Diagram

XYNC full block diagram (with phase sync loopback)

RF Bandwidth

XYNC is based on multiple synchronized XTRX SDRs, so the maximum achievable RF bandwidth is a function of the individual XTRX RF bandwidths.

If you want to tune XYNC channels to receive or transmit at different parts of the spectrum, please keep two things in mind:

  1. XTRX RF filters are not ideal and have natural roll-off towards the edge, so you might need to overlap the XTRXs’ receive/transmit windows to achieve a contiguous spectrum within which to receive or transmit.
  2. Each XTRX has only one receive and one transmit PLL, so both channels of each XTRX are “locked” to each other. This means that you effectively have up to only eight independent channels per XYNC and it makes sense to run each XTRX in SISO mode.

Sampling Rate & Throughput Limits

XYNC uses a PCIe switch to connect all its XTRXs to a single PCIe bus. The XTRXs are connected to the PCIe switch with PCIe 2.0 x1 buses, and the switch is connected to the host with a PCIe 2.0 x4 bus, which introduces additional limits to the XYNC sampling rate and throughput compared to a single XTRX.

Expanding on the (theoretical) maximum XTRX throughput limits, we get the following throughput per channel for XYNC Quadro and Octo in various configurations. Green cells indicate combinations of sample rate and PCIe bus configuration where the sampling rate is not limited by the PCIe bus but is rather limited by the XTRX itself.

Maximum PCIe Bus Throughput by Configuration

Mode IQ x Ch x bits Bits total PCIe 1.0 x1 (max 1,750 Mbps) PCIe 2.0 x1 or PCIe 1.0 x2 (max 3,500 Mbps) PCIe 2.0 x2 (max 7,000 Mbps) PCIe 2.0 x4 XYNC Total throughput (max 14,000 Mbps) PCIe 2.0 x4 per XYNC Quadro channel (max 14,000 Mbps) PCIe 2.0 x4 per XYNC Octo channel (max 14,000 Mbps)
XTRX XYNC
8-bit SISO 2 x 1 x 8 16 bits 109 Msps 219 Msps 438 Msps 875 Msps 219 Msps 109 Msps
12-bit SISO 2 x 1 x 12 24 bits 73 Msps 146 Msps 292 Msps 583 Msps 146 Msps 73 Msps
16-bit SISO 2 x 1 x 16 32 bits 55 Msps 109 Msps 219 Msps 438 Msps 109 Msps 55 Msps
8-bit MIMO 2 x 2 x 8 32 bits 55 Msps 109 Msps 219 Msps 438 Msps 109 Msps 55 Msps
12-bit MIMO 2 x 2 x 12 48 bits 36 Msps 73 Msps 146 Msps 292 Msps 73 Msps 36 Msps
16-bit MIMO 2 x 2 x 16 64 bits 27 Msps 55 Msps 109 Msps 219 Msps 55 Msps 27 Msps

Synchronization & Phase Coherency

What exactly does XYNC synchronize? The answer is a bit complex. Below are some important facts you should keep in mind:

  • Each XTRX on an XYNC is a 2x2 MIMO transceiver and could be seen as a “channel pair.” This means that each XTRX (i.e., each channel pair) can be tuned to a different (or the same!) RF frequency, but both channels in the pair will always have the same RF frequency. Also, the RX and TX frequencies of each XTRX are tuned independently of other XTRXs.
  • The ADCs and DACs of all of the XTRXs on an XYNC are locked to a common reference clock. This means they are sampling with exactly same frequency but might sample at different points in time. In other words, any two XTRXs on an XYNC have a phase difference between them.
  • All XTRXs are locked to a common 1pps synchronization signal, so timestamps are also synchronized between all sample streams.
  • Up/downconverter PLLs are locked to a common reference clock but not phase-synchronized between XTRXs.
  • If you’re looking to do direction finding or beamforming, you would need to take an extra step of calibrating the phases between all XTRXs. You can use either the built-in sine generator or an external sync sequence (e.g., from an external XTRX). Depending on your phase coherency precision requirements you may need to repeat the calibration regularly (e.g., every half an hour).
  • If you’re looking for a non-beamforming MIMO, XYNC should work just fine for you.

Features & Specifications

  • RF Chipset: 4x or 8x Lime Microsystems LMS7002M FPRF
  • FPGA: 4x or 8x Xilinx Artix 7 50T
  • Channels: 8×8/16×16/32×32 MIMO
  • Sample Rate: ~0.2 MSPS to 120 MSPS per channel (subject to the limitations explained above)
  • PCIe Bandwidth: PCIe x4 Gen 2.0, 16 Gbit/s
  • RF Output Power: 0 to 10 dBm depending on frequency
  • RF Bandwidth: 1.4 MHz to 130 MHz (1.4 MHz to 30 MHz for the 6 GHz Rx option)
  • Tuning Range: 30 MHz - 3.8 GHz
  • Rx/Tx Range:
    • 10 MHz - 3.7 GHz
    • 100 kHz - 3.8 GHz with signal level degradation
  • Reference Clock:
    • Stability w/o GPS: 100 ppb from 0°C to 70°C
    • Stability w/GPS: <10 ppb stability after GPS/GNSS lock
  • Form Factor: full-size PCIe
  • Bus Latency: <10 µs, stable over time
  • Synchronization: synchronize two XYNC boards directly or multiple XYNC boards with an external clock distribution network

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