Results for 'risc-v'


Project Update · DDR3 RAM and a Libre RISC-V SoC
1.110
Sourcing DDR3 RAM proving to be interestingly challenging; Libre RISC-V SoC underway.

Project Update · 5th RISC-V Workshop
1.110
We (Elkim and Ckristian) spent last week in the Bay Area attending the 5th RISV-V Workshop and meeting with a bunch of people in the industry. This first update reports some of the interesting things to came out of this trip.

Project Update · RISC-V and the History of POWER
1.100
We get asked a lot about why we aren't using RISC-V for Talos™. This update details our rationale and delves into the long history of POWER over the past several decades.

Milk-V Pioneer
Project · Milk-V Pioneer
1.090
A 64-core, RISC-V motherboard and workstation for native development

EOMA68
Thank you to absolutely everyone who came to FOSDEM. RISC-V gets interesting. A reminder that EOMA68 is a Certification Mark. EOMA68-A20 card supply chain progress.

Libre RISC-V M-Class
Project · Libre RISC-V M-Class
1.050

The HDMI taper turns out to be a red herring, an alternative approach is needed; An anonymous sponsor donates a ZC706 for developing a libre 64-bit RISC-V SoC.

In this update we'll be exploring a homegrown SoC which is capable of booting Linux, µLinux and XV6. It implements the RISC-V RV32IMA ISA alongside additional extensions for more functionality.

Milk-V Pioneer
Check out our new features and integrations!

Everyone's favorite 10 cent RISC-V microcontroller, the ch32v003 came out at the end of 2022, but, for the first six months, only a proprietary environment was available for its development. That official environment had a hefty HAL as well. This would not do for people hoping to do serious projects on a 16kB flash, 2kB RAM chip. We will go though every step of the process of how embedded SDKs take high level C code and craft together tiny binaries for microcontrollers. We’ll go through linker scripts, startup code, interrupt vectors and flashing processes. This talk will not go into the super nitty gritty, but rather how embedded SDKs fit together, and how you can “bring up” a new processor from nothing.

Conference Event · Building Your Own RISC-V CPU and Compiler
1.020
Using a toy compiler written in Crystal, a Ruby-like compiled language, generate RISC-V assembly for a customized CPU running on a BeagleV-Fire FPGA board.

This update has lots of news about the Morpheus community, including a new gamepad add-on board, technical details, and reports of a mysterious kidnapping!

New: Inkplate 13SPECTRA, Dabao Evaluation Board of Baochip-1x, ANAVI TPM 2.0 for Raspberry Pi; Coming Soon: Openterface KeyMod, HummingKit, CycloMod, Hoopi Pedal, IQL Camera Bridge for Arduino UNO Q, ELM11-Feather; In Stock: Precursor, ULX3S

LeafKVM
New: 5MP GS Pi Camera, GameTank, Pixlpal; Coming Soon: LeafKVM, Pixblasters MINI LED Controller, TouchNot Pro; Teardown 2026: Super Early Bird Tickets; In Stock: Icepi Zero, Vapor Phase One; NextPCB: RAK3172 LoRaWAN module

RISC-V
Read the full update to learn how backer Thomas H. used FireAnt to run a RISC-V based SoC.

HiFive Unleashed and LimeSDR
We’re excited to share details of something we’ve been working on in partnership with SiFive.

Tag · RISC-V
1.000

Project · HiFive1
0.390
An open source, Arduino-compatible RISC-V dev kit

Project · PolarBerry
0.360
A secure PolarFire SoC (FPGA + RISC-V) Linux-capable SBC and SoM

HiFive Unleashed
Project · HiFive Unleashed
0.320
The world’s first RISC-V-based, Linux-capable development board
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